Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/58045
Title: Writing Testbenches using SystemVerilog
Authors: Janick, Bergeron
Issue Date: 2006
Publisher: Springer Science+Business Media, Inc.
URI: http://10.6.20.12:80/handle/123456789/58045
ISBN: 0-387-29221-7
Appears in Collections:Electrical and Computer Engineering

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