Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/57917
Title: DIRECT TRANSISTOR-LEVEL LAYOUT FOR DIGITAL BLOCKS
Authors: PRAKASH, GOPALAKRISHNAN
Issue Date: 2005
Publisher: Springer Science + Business Media, Inc.
URI: http://10.6.20.12:80/handle/123456789/57917
ISBN: 1-4020-8063-8
Appears in Collections:Electrical and Computer Engineering

Files in This Item:
File Description SizeFormat 
25.pdf8.83 MBAdobe PDFView/Open
Show full item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.