Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/66697
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dc.contributor.authorKogel, Tim-
dc.date.accessioned2019-05-07T08:29:07Z-
dc.date.available2019-05-07T08:29:07Z-
dc.date.issued2006-
dc.identifier.isbn1-4020-4825-4-
dc.identifier.urihttp://10.6.20.12:80/handle/123456789/66697-
dc.language.isoenen_US
dc.publisherSpringeren_US
dc.titleIntegrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platformsen_US
dc.typeBooken_US
Appears in Collections:Electrical and Computer Engineering

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