Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/58013
Title: SYSTEMVERILOG FOR VERIFICATION A Guide to Learning the Testbench Language Features
Authors: CHRIS, SPEAR
Issue Date: 2006
Publisher: Springer Science+Business Media, LLC
URI: http://10.6.20.12:80/handle/123456789/58013
ISBN: 0-387-27036-1
Appears in Collections:Electrical and Computer Engineering

Files in This Item:
File Description SizeFormat 
42.pdf1.98 MBAdobe PDFView/Open
Show full item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.