Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/31917
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dc.contributor.editorGerhard Goos, Juris Hartmanis, and Jan van Leeuwenen_US
dc.date.accessioned2018-12-27T11:08:35Z-
dc.date.available2018-12-27T11:08:35Z-
dc.date.issued2005-
dc.identifier.isbn3-540-30205-0-
dc.identifier.isbn929en_US
dc.identifier.urihttp://10.6.20.12:80/handle/123456789/31917-
dc.language.isoenen_US
dc.publisherSpringer-Verlagen_US
dc.subjectIntegrated Circuiten_US
dc.titleIntegrated Circuit and System Design Power and Timing Modeling, Optimization and Simulation 14th International Workshop, PATMOS 2004 Santorini, Greece, September 15-17, 2004 Proceedingsen_US
dc.typeBooken_US
Appears in Collections:Electrical and Computer Engineering

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