Please use this identifier to cite or link to this item: 192.168.6.56/handle/123456789/31910
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dc.contributor.authorAyala, José L-
dc.date.accessioned2018-12-27T10:56:44Z-
dc.date.available2018-12-27T10:56:44Z-
dc.date.issued2011-
dc.identifier.isbn978-3-642-24153-6-
dc.identifier.isbn336en_US
dc.identifier.urihttp://10.6.20.12:80/handle/123456789/31910-
dc.language.isoenen_US
dc.publisherSpringer-Verlag Berlin Heidelbergen_US
dc.subjectSystem Designen_US
dc.titleIntegrated Circuit and System Design Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011 Madrid, Spain, September 26-29, 2011 Proceedingsen_US
dc.typeBooken_US
Appears in Collections:Electrical and Computer Engineering

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